wiki / budget-pcb-workflow
Budget PCB workflow
The pipeline I use for every board, tuned for cost without sacrificing the ability to actually debug the thing later.
The flow
- Schematic + layout in KiCad 8 — one project per board revision
- DRC clean, then export gerbers with the fab's own plugin
- Five boards, standard leadtime, no expedite — patience is the discount
- Hand-assemble one board first; reflow the rest only after it works
Cost rules that hold up
| Choice | Why it stays cheap |
|---|---|
| 2-layer unless RF forces 4 | 4-layer roughly doubles the run |
| 0805 passives minimum | hand-reworkable without a microscope |
| One MCU family per year | toolchain amortizes across projects |
Mistakes I stopped making
Ordering assembly for rev-A boards. Rev A always has a wrong footprint — see the LDO incident logged in Bench failure log. Assemble rev A yourself; pay for assembly at rev B when the netlist has earned it.
Related: Start here